Boolean Logic Function Synthesis for Generalised Threshold Gate Circuits

被引:0
作者
Bawiec, Marek A. [1 ]
Nikodem, Maciej [1 ]
机构
[1] Wroclaw Univ Technol, Inst Comp Engn Control & Robot, PL-50370 Wroclaw, Poland
来源
DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2009年
关键词
GTG; Nanoscale Devices; Logic Synthesis; NDR; DIFFERENTIAL-RESISTANCE DEVICES; DESIGN;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper analyses negative differential resistance (NDR) based logic circuits operating in monostable-bistable transition logic element (MOBILE) regime. We formulate theoretical foundation for formal model of the generalised threshold gate (GTG) and prove that GTG can implement any, a-variable Boolean function. Moreover, we propose the algorithmic approach to GTG structure generation problem.
引用
收藏
页码:83 / 86
页数:4
相关论文
共 9 条
[1]   WEIGHTED SUM THRESHOLD LOGIC OPERATION OF MOBILE (MONOSTABLE-BISTABLE TRANSITION LOGIC ELEMENT) USING RESONANT-TUNNELING TRANSISTORS [J].
AKEYOSHI, T ;
MAEZAWA, K ;
MIZUTANI, T .
IEEE ELECTRON DEVICE LETTERS, 1993, 14 (10) :475-477
[2]  
AVEDILLO M, 2005, LOGIC MODELS SUPPORT, P254
[3]   Multi-threshold threshold logic circuit design using resonant tunnelling devices [J].
Avedillo, MJ ;
Quintana, JM ;
Pettenghi, H ;
Kelly, PM ;
Thompson, CJ .
ELECTRONICS LETTERS, 2003, 39 (21) :1502-1504
[4]   Compact binary logic circuits design using negative differential resistance devices [J].
Berezowski, K. S. .
ELECTRONICS LETTERS, 2006, 42 (16) :902-903
[5]   Noninverted/inverted monostabel-to-bistable transition logic element circuits using three resonant tunneling diodes and their application to a static binary frequency divider [J].
Kim, Hyungtae ;
Seo, Kwangseok .
JAPANESE JOURNAL OF APPLIED PHYSICS, 2008, 47 (04) :2854-2857
[6]   Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices [J].
Kim, T. ;
Jeong, Y. ;
Yang, K. .
IET CIRCUITS DEVICES & SYSTEMS, 2008, 2 (02) :281-287
[7]   A novel contribution to the RTD-based threshold logic family [J].
Pettenghi, Hector ;
Avedillo, Maria J. ;
Quintana, Jose M. .
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, :2350-2353
[8]   Using multi-threshold threshold gates in RTD-based logic design: A case study [J].
Pettenghi, Hector ;
Avedillo, Maria J. ;
Quintana, Jose M. .
MICROELECTRONICS JOURNAL, 2008, 39 (02) :241-247
[9]  
ZHENG Y, 2008, AS S PAC DES AUT C M, P71