Design and Characterization of Graphene Nano-Ribbon Based D-Flip-Flop

Graphene Nano Ribbon (GNR) based transistor can be considered as one of the alternative for the silicon elements for post-Silicon electronics. This paper introduces design and characterization of logic circuit based on Schottky-Barrier type Graphene Nano-Ribbon Field-Effect Transistors (SB-GNRFETs). We consider design and characterization of a Multiplexer (MUX), Latch, and D-Flip-Flop. An extensive Monte Carlo analyses considering the GNR based device parameters shows the limitation and effect of these parameters on the logic circuits performance. Circuit simulation and analysis is done using commercial SPICE simulator using GNR-FET models based on Single-Gate SB-GNRFET. We also compare the performance of proposed SB-GNRFET based DFF and its counterpart in CMOS technology. The proposed SB-GNRFET based DFF shows notable performance improvement in comparison with the conventional CMOS based technology. Finally, considering feasibility, this paper suggest layout designs for proposed device.