A low phase noise 30-GHz frequency synthesizer with linear transconductance VCO and dual-injection-locked frequency divider

被引:3
作者
Lee, Dong-Soo [1 ]
Cho, SungHun [1 ]
Kim, SangYun [1 ]
Lee, JaeYong [2 ]
Hwang, KeumCheol [1 ]
Yang, Youngoo [1 ]
Seo, Mun-Kyo [1 ]
Pu, YoungGun [1 ]
Lee, Kang-Yoon [1 ]
机构
[1] Sungkyunkwan Univ, Coll Informat & Commun Engn, 2066 Seobu Ro, Suwon 440746, Gyeonggi Do, South Korea
[2] Hubilon Co Ltd, 1355-3 Seocho, Seoul, South Korea
关键词
Frequency synthesizer; Linear transconductance voltage-controlled oscillator; Dual-injection; locked frequency divider; Automatic frequency calibration; Low phase noise; LOCKING;
D O I
10.1007/s10470-016-0692-6
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, a low phase noise 30-GHz frequency synthesizer with a linear transconductance voltage-controlled oscillator (VCO) and dual-injection-locked frequency divider (ILFD) is presented. In order to improve the phase noise of the frequency synthesizer, the LC VCO is designed with transconductance linearization of the active devices. A dual-ILFD is proposed in order to achieve a wide locking range with low power consumption. It is implemented in 65 nm CMOS and the die area is 1.2 mm x 0.8 mm. The power consumption is 55 mW from the supply voltage of 1 V. The measured phase noise of the VCO is respectively -106 and -97.88 dBc/Hz at a 1-MHz offset from carrier frequency of 30.24 and 60.48 GHz. The measured tuning range of the VCO is about 13 %. The locking frequency range of the ILFD is from 14.1 to 45.8 GHz at the injection power of -6 dBm, with its load current being controlled automatically.
引用
收藏
页码:365 / 376
页数:12
相关论文
共 27 条
[1]   Comparison of Ring and LC Oscillator-based ILFDs in Terms of Phase Noise, Locking Range, Power Consumption and Quality Factor [J].
Brandonisio, Francesco ;
Kennedy, Michael Peter .
PRIME: PROCEEDINGS OF THE CONFERENCE 2009 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, 2009, :292-+
[2]   A 24-GHz divide-by-4 injection-locked frequency divider in 0.13-μm CMOS technology [J].
Chen, Chung-Chun ;
Wang, Chi-Hsueh ;
Huang, Bo-, Jr. ;
Tsao, Hen-Wai ;
Wang, Huei .
2007 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS, 2007, :340-+
[3]  
Chihun Lee, 2007, 2007 IEEE International Solid-State Circuits Conference (IEEE Cat. No.07CH37858), P196
[4]   A ring-oscillator-based wide locking range frequency divider [J].
Chuang, Y-H. ;
Lee, S-H. ;
Jang, S-L. ;
Chao, J-J. ;
Juang, M-H. .
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2006, 16 (08) :470-472
[5]   A fully integrated CMOS DCS-1800 frequency synthesizer [J].
Craninckx, J ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (12) :2054-2065
[6]   Threshold voltage mismatch and intra-die leakage current in digital CMOS circuits [J].
de Gyvez, JP ;
Tuinhout, HP .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) :157-168
[7]   LTE-ADVANCED: NEXT-GENERATION WIRELESS BROADBAND TECHNOLOGY [J].
Ghosh, Amitava ;
Ratasuk, Rapeepat ;
Mondal, Bishwarup ;
Mangalvedhe, Nitin ;
Thomas, Tim .
IEEE WIRELESS COMMUNICATIONS, 2010, 17 (03) :10-22
[8]  
Hajimiri Ali, 2009, Proceedings of the 39th European Solid-State Device Research Conference. ESSDERC 2009, P64, DOI 10.1109/ESSDERC.2009.5331369
[9]   Concepts and methods in optimization of integrated LC VCOs [J].
Ham, D ;
Hajimiri, A .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (06) :896-909
[10]  
Kim Daeik D., 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, P460, DOI 10.1109/ISSCC.2008.4523256