Performance Optimization of Basic Building Blocks using Graphene Nanoribbon FETs

CMOS technology has been the driving force behind tremendous accomplishments obtained in the field of electronics, computing and telecommunications. However there is a rapid need to explore alternative device technologies that could somehow either complement the existing CMOS technology or replace it in order to avoid saturation of Moore's Law. Graphene Nanoribbon Field Effect Transistors (GNRFET) could serve as an alternative since it utilizes the extraordinary properties associated with Graphene. This paper investigates the performance of basic building blocks i.e NAND and NOR gates designed with the help of GNRFETs. The GNRFET's have been optimized in terms of Number of Nanoribbons and Oxide thickness. Results demonstrate that optimized GNRFET based logic circuits outperforms its CMOS counterpart, especially in terms of Power Delay Product at scaled supply voltage.