Automatic test generation algorithms based on chaotic neural network

被引：0

作者：

Xie, H ^{[1
]}

Wang, HJ ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, Coll Mechatron Engn, Chengdu 610054, Peoples R China

来源：

2004 INTERNATIONAL CONFERENCE ON COMMUNICATION, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS | 2004年

关键词：

chaotic neural network; combinational circuit; test generation;

D O I：

10.1109/ICCCAS.2004.1346368

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A test generation system based on digital circuit's neural network model is described in this paper. A fault is injected into the neural network and an energy function is constructed with global minima at test vectors. Global minima are determined by chaotic neural networks method employing four different algorithms, and the algorithms are compared in test-time and test-figure. Simulation results on combinational circuits confirm the feasibility of this technique.

引用

页码：1099 / 1102

页数：4

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