Performance enhancement of offset gated polysilicon thin-film transistors

被引:14
作者
Dimitriadis, CA [1 ]
Miyasaka, M
机构
[1] Univ Thessaloniki, Dept Phys, Salonika 54006, Greece
[2] Seiko Epson Corp, Base Technol Res Ctr, Nagano 3928502, Japan
关键词
offset-gated; polysilicon performance; polysilicon TFTs;
D O I
10.1109/55.887473
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Simple offset gated n-channel polysilicon thin film transistors (TFTs) of channel length L = 10 mum were investigated in relation to the intrinsic offset length DeltaL and the polysilicon quality. For at DeltaL less than or equal to 1 mum, the device parameters such as threshold voltage, subthreshold slope and field effect mobility are improved, while the leakage current remains unchanged. In TFTs with DeltaL > 1 mum, the leakage current decreases with increasing the offset length. When the polysilicon layer is of high quality (large grain size and low intra-grain defect density), the leakage current is completely suppressed without sacrificing the on-current in TFT's with offset length of 2 mum.
引用
收藏
页码:584 / 586
页数:3
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