Effective Metal Work Function of Pt Gate Electrode in Ge Metal Oxide Semiconductor Device

被引：13

作者：

Chandra, S. V. Jagadeesh ^{[1
]}

Jeong, Mi-Ra ^{[1
]}

Shim, Kyu-Hwan ^{[1
]}

Hong, Hyo-Bong ^{[3
]}

Lee, Soo-Hyung ^{[3
]}

Ahn, Kwang-Soon ^{[2
]}

Choi, Chel-Jong ^{[1
]}

机构：

[1] Chonbuk Natl Univ, Semicond Phys Res Ctr, Sch Semicond & Chem Engn, Jeonju 561756, South Korea

[2] Yeungnam Univ, Sch Display & Chem Engn, Kyongsan 712749, South Korea

[3] Elect & Telecommun Res Inst, Future Technol Res Grp, Taejon 305700, South Korea

来源：

JOURNAL OF THE ELECTROCHEMICAL SOCIETY | 2010年 / 157卷 / 05期

关键词：

annealing; dielectric materials; electric properties; Fermi level; germanium; hafnium compounds; metallisation; MIS devices; platinum; silicon; work function; ATOMIC-LAYER DEPOSITION; HIGH-KAPPA; HFO2; SI; DIELECTRICS;

D O I：

10.1149/1.3332849

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

We fabricated Ge and Si metal oxide semiconductor devices with Pt/HfO(2) gate stacks and investigated their structural and electrical properties. Postmetallization annealing in O(2) ambient reduced the accumulation capacitance more significantly in Si devices than in Ge devices due to the increase in the thickness of a low-k interfacial layer in between the HfO(2) film and Si substrate. Ge devices exhibited lower effective work function values for a Pt gate electrode than Si devices owing to the presence of a large number of positively charged dipoles caused by a strong Fermi-level pinning at the Ge surface.

引用

页码：H546 / H550

页数：5

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