VLSI implementation of online digital watermarking technique with difference encoding for 8-bit gray scale images

被引：28

作者：

Garimella, A ^{[1
]}

Satyanarayana, MVV ^{[1
]}

Kumar, RS ^{[1
]}

Murugesh, PS ^{[1
]}

Niranjan, UC ^{[1
]}

机构：

[1] Manipal Acad Higher Educ, Manipal 576119, India

来源：

16TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS | 2003年

关键词：

watermarking; image processing; VLSI; ASIC design;

D O I：

10.1109/ICVD.2003.1183151

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

Digital watermarking is a technique of embedding imperceptible information into the digital documents. In this paper, VLSI implementation of Digital Watermarking technique is presented for 8 bit gray scale images. This implementation of fragile invisible watermarking is carried out in spatial domain. The standard ASIC design flow for 0.13 mu CMOS technology has been used to implement the algorithm. The area of the chip is 3,453 x 3,453 mum(2) and the power consumption is 37.6 muW.

引用

页码：283 / 288

页数：6