Thermal characteristic of Cu-Cu bonding layer in 3-D integrated circuits stack

被引:7
|
作者
Tan, Chuan Seng [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
关键词
3-D ICs; Copper; Wafer bonding; Heat dissipation;
D O I
10.1016/j.mee.2009.09.009
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Copper (Cu) thermo-compression bonding of wafers can be used to fabricate multi-layer three-dimensional (3-D) integrated circuits (ICs). This work examines the thermal characteristic of the Cu bonding layer and demonstrates experimentally that Cu bonding layer can act as a spreading layer that helps in heat dissipation of bonded 3-D ICs stack more efficiently compared to silicon dioxide bonding layer. The use of Cu bonding layer in a double-layer stack of ICs provides better cooling by as much as 9 degrees C compared to oxide bonding interface. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码:682 / 685
页数:4
相关论文
共 50 条
  • [1] High Density Cu-Cu Interconnect Bonding for 3-D Integration
    Lannon, J., Jr.
    Gregory, C.
    Lueck, M.
    Huffman, A.
    Temple, D.
    2009 IEEE 59TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, VOLS 1-4, 2009, : 355 - 359
  • [2] Investigation of Low-Temperature Cu-Cu Direct Bonding With Pt Passivation Layer in 3-D Integration
    Liu, Demin
    Kuo, Tsung-Yi
    Liu, Yu-Wei
    Hong, Zhong-Jie
    Chung, Ying-Ting
    Chou, Tzu-Chieh
    Hu, Han-Wen
    Chen, Kuan-Neng
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2021, 11 (04): : 573 - 578
  • [3] Development of low temperature Cu-Cu bonding and hybrid bonding for three-dimensional integrated circuits (3D IC)
    Hu, Han-Wen
    Chen, Kuan-Neng
    MICROELECTRONICS RELIABILITY, 2021, 127 (127)
  • [4] Modeling of Cu-Cu Thermal Compression Bonding
    Shie, Kai-Cheng
    Tran, Dinh-Phuc
    Gusak, A. M.
    Tu, K. N.
    Liu, Hung-Che
    Chen, Chih
    IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 2201 - 2205
  • [5] Cu-Cu Bonding Using Selective Cobalt Atomic Layer Deposition for 2.5-D/3-D Chip Integration Technologies
    Li, Ming-Jui
    Breeden, Michael
    Wang, Victor
    Hollin, Jonathan
    Linn, Nyi Myat Khine
    Winter, Charles H.
    Kummel, Andrew
    Bakir, Muhannad S.
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2020, 10 (12): : 2125 - 2128
  • [6] Insertion Bonding: A Novel Cu-Cu Bonding Approach for 3D Integration
    Okoro, Chukwudi
    Agarwal, Rahul
    Limaye, Paresh
    Vandevelde, Bart
    Vandepitte, Dirk
    Beyne, Eric
    2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 1370 - 1375
  • [7] Cu-Cu direct bonding by introducing Au intermediate layer
    Noma, Hirokazu
    Kamibayashi, Takumi
    Kuwae, Hiroyuki
    Suzuki, Naoya
    Nonaka, Toshihisa
    Shoji, Shuichi
    Mizuno, Jun
    2017 5TH INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2017, : 70 - 70
  • [8] High Density Interconnect at 10μm Pitch with Mechanically Keyed Cu/Sn-Cu and Cu-Cu Bonding for 3-D Integration
    Reed, Jason D.
    Lueck, Matthew
    Gregory, Chris
    Huffman, Alan
    Lannon, John M., Jr.
    Temple, Dorota
    2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 846 - 852
  • [9] Cu-Cu Hybrid Bonding as Option for 3D IC Stacking
    Hu, Y. H.
    Liu, C. S.
    Lii, M. J.
    Rebibis, K. J.
    Jourdain, A.
    La Manna, A.
    Beyne, E.
    Yu, C. H.
    2012 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE (IITC), 2012,
  • [10] Low temperature Cu-Cu direct bonding for 3D-IC by using fine crystal layer
    Sakai, Taiji
    Imaizumi, Nobuhiro
    Miyajima, Toyoo
    2012 2ND IEEE CPMT SYMPOSIUM JAPAN, 2012,