Transposable 3T-SRAM Synaptic Array Using Independent Double-Gate Feedback Field-Effect Transistors

被引:16
|
作者
Woo, Sola [1 ]
Cho, Jinsun [2 ]
Lim, Doohyeok [1 ]
Cho, Kyoungah [1 ]
Kim, Sangsig [3 ]
机构
[1] Korea Univ, Dept Elect Engn, Seoul 02841, South Korea
[2] Korea Univ, Dept Semicond Syst Engn, Seoul 02841, South Korea
[3] Korea Univ, Dept Semicond Syst Engn, Dept Elect Engn, Seoul 02841, South Korea
基金
新加坡国家研究基金会;
关键词
Transistors; Logic gates; Random access memory; Electric potential; Doping; Feedback loop; Computational modeling; Double-gate; feedback field-effect transistors (FBFETs); static random access memory (SRAM); synapse device; transposable memory; MEMORY; PLASTICITY; NETWORK;
D O I
10.1109/TED.2019.2939393
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this article, we present a transposable three-transistor static random access memory (3T-SRAM) array consisting of independent double-gate feedback field-effect transistors as binary synaptic devices and access transistors. The synaptic functions of the ${2} \times {2}$ SRAM array are investigated through mixed-mode technology computer-aided design simulations. This 3T-SRAM array provides parallel and bidirectional synaptic updates with fast operating speed. Furthermore, a simplified spike-timing-dependent plasticity learning rule is implemented by adjusting the widths of memory pulses. A compact cell area and a low-leakage power consumption allow this 3T-SRAM array to be used for adaptive synaptic devices in a large-scale neuromorphic system.
引用
收藏
页码:4753 / 4758
页数:6
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