CMOS PWM VLSI implementation of neural network

被引：1

作者：

Chen, L ^{[1
]}

Shi, BX ^{[1
]}

机构：

[1] Tsing Hua Univ, Inst Microelect, Beijing 100084, Peoples R China

来源：

IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL III | 2000年

关键词：

neural network; VLSI; pulse width modulation;

D O I：

10.1109/IJCNN.2000.861355

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Neural network's VLSI implementation based on Pulse Width Modulation technique is analyzed. A simple synapse multiplier is proposed, which has high precision and large linearity range. A voltage-mode sigmoid circuit with adjustable gain is analyzed, which is used for neuron activation functions. A voltage-pulse conversion circuit required for PWM is suggested, which has high conversion precision and linearity. On the basis of the above circuits, a PWM VLSI neural network to solve XOR problem is designed, The simulation result shows its correct function and fast speed, it is suitable for VLSI implementation of neural network.

引用

页码：485 / 488

页数：4

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