Neutron-induced latchup in SRAMs at ground level

被引：34

作者：

Dodd, PE ^{[1
]}

Shaneyfelt, MR ^{[1
]}

Schwank, JR ^{[1
]}

Hash, GL ^{[1
]}

机构：

[1] Sandia Natl Labs, Albuquerque, NM 87185 USA

来源：

41ST ANNUAL PROCEEDINGS: INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2003年

关键词：

D O I：

10.1109/RELPHY.2003.1197720

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Neutron-induced single-event latchup has been studied in SRAMs manufactured by several different vendors. These SRAMs span different cell designs (six-transistor and four-transistor cells), technology generations (0.25 mum to 0.14 mum) and power supplies (5 V to 1.5 V). While some technologies appear to be latchup-free in neutron environments, others have neutron-induced latchup failure-in-time, (FIT) rates as high as 300 FIT/Mbit at room temperature and maximum rated voltage. Latchup FIT rates increase dramatically with temperature. The observed latchup, rates can lead to very high failure rates in. systems with large amounts of memory, and can't be circumvented using terror correction.

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收藏

页码：51 / 55

页数：5

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