A Novel Structure for Improving Erase Performance of Vertical Channel NAND Flash With an Indium-Gallium-Zinc-Oxide Channel

We propose a novel structure to solve the hole erase problem of Indium-Gallium-Zinc-Oxide (IGZO) channels. The proposed structures are an IGZO-nitride-P filler (INP) structure and an IGZO-P filler (IP) structure. In the simulations using both structures, stable operation and erase efficiency can be achieved in an INP structure when the nitride barrier thickness is 7 nm. The erase performance achieved exceeds that of the polysilicon channel under the same conditions. Conversely, if the nitride thickness exceeds 8 nm, the read operation becomes unstable. Therefore, nitride thickness is an important parameter in the operation of an INP structure, and its maximum value is 7 nm. For improving upon this INP structure, the nitride was removed to create an IP structure, in which, leakage currents could be limited by reducing doping concentration. In particular, such an IP structure showed that the maximum erase performance (2 ms) of the polysilicon channel can only be achieved at 2.3 mu s, and then the erase operation can continue. This result is due to lack of electron accumulation in the channel and their ability to move quickly through the filler directly connected to the IGZO channel. As a result, both proposed structures have shown that low erase performance can be overcome without sacrificing the excellent leakage current blocking characteristics of IGZO material.