Universal fault diagnosis for lookup table FPGAs

被引：40

作者：

Inoue, T ^{[1
]}

Miyazaki, S ^{[1
]}

Fujiwara, H ^{[1
]}

机构：

[1] Nara Inst Sci & Technol, Grad Sch Informat Sci, Nara 63001, Japan

来源：

IEEE DESIGN & TEST OF COMPUTERS | 1998年 / 15卷 / 01期

关键词：

D O I：

10.1109/54.655181

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Focusing on configurable logic blocks in a lookup table FPGA, the authors present universal fault diagnosis procedures that can locate a fault to just one CLB. The complexity of the proposed procedure for FPGAs using block-sliced loading is independent of FPGA array size.

引用

页码：39 / 44

页数：6

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