共 16 条
[1]
Linearity enhancement of multibit Delta Sigma and D/A converters using data weighted averaging
[J].
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING,
1995, 42 (12)
:753-762
[6]
He T, 2017, MIDWEST SYMP CIRCUIT, P1517, DOI 10.1109/MWSCAS.2017.8053223
[7]
Hershberg B, 2019, ISSCC DIG TECH PAP I, V62, P68, DOI 10.1109/ISSCC.2019.8662319
[8]
Hershberg B, 2019, ISSCC DIG TECH PAP I, V62, P58, DOI 10.1109/ISSCC.2019.8662290
[10]
16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme
[J].
2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC),
2020,
:256-+