Optical interconnects for neural and reconfigurable VLSI architectures

被引:35
作者
Fey, D [1 ]
Erhard, W
Gruber, M
Jahns, J
Bartelt, H
Grimm, G
Hoppe, L
Sinzinger, S
机构
[1] Univ Gesamthsch Siegen, Inst Rechnerstrukturen, D-57068 Siegen, Germany
[2] Univ Jena, Inst Informat, D-07743 Jena, Germany
[3] Fern Univ Hagen, D-58084 Hagen, Germany
[4] Inst Phys Hochtechnol Jena, D-07745 Jena, Germany
关键词
associative memory; fiber arrays; neural processing; optical inter-connects; optoelectronic VLSI; planar optics; reconfigurable architectures; SEED-CMOS chip; vertical-cavity surface-emitting laser (VCSEL);
D O I
10.1109/5.867697
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The increasing transistor density in very large-scale integrated (VLSI) circuits and the limited pin number in the off-chip communication lead to a situation described as interconnect crisis in microelectronics. Optoelectronic VLSI (OE-VLSI) circuits using short-distance optical interconnects and optoelectronic devices like microlaser, modulator, and detector arrays for optical off-chip sending and receiving offer a technology to overcome this crisis. However, in order to exploit efficiently the potential of thousands of optical off-chip interconnects, an appropriate VLSI architecture is required. We show for the example of neural and reconfigurable VLSI architectures that fine-grain architectures fulfill these requirements. An OE-VLSI circuit realization based on multiple quantum-well modulators functioning as two-dimensional (2-D) optical input/output (I/O) interface for the chip is presented. Due to the parallel optical interface, an improvement of two to three orders of magnitude in the throughput performance is possible compared to all-electronic solutions. For the optical interconnects, a planar-integrated free-space optical system has been designed leading to an optical multichip module. Such a system has been fabricated and experimentally characterized. Furthermore, we designed and manufactured fiber arrays, which will be the core element for a convenient test station for the 2-D optoelectronic I/O interface of OE-VLSI circuits.
引用
收藏
页码:838 / 848
页数:11
相关论文
共 40 条
  • [1] BAHR J, 1998, P OPT COMP OC 98 BRU, P419
  • [2] BARTELT H, 1999, P 4 NAT WORKSH OPT C, P6
  • [3] Fully embedded board-level guided-wave optoelectronic interconnects
    Chen, RT
    Lin, L
    Choi, C
    Liu, YJJ
    Bihari, B
    Wu, L
    Tang, SN
    Wickman, R
    Picor, B
    Hibbs-Brenner, MK
    Bristow, J
    Liu, YS
    [J]. PROCEEDINGS OF THE IEEE, 2000, 88 (06) : 780 - 793
  • [4] COOK R, 1998, SUN WORLD NOV
  • [5] FELDMAN MR, 1990, P SOC PHOTO-OPT INS, V1390, P427
  • [6] Specification for a reconfigurable optoelectronic VLSI processor suitable for digital signal processing
    Fey, D
    Kasche, B
    Burkert, C
    Tschache, O
    [J]. APPLIED OPTICS, 1998, 37 (02): : 284 - 295
  • [7] FEY D, 1996, EUR PAR96 PAR PROC, V2, P478
  • [8] PHASE RETRIEVAL ALGORITHMS - A COMPARISON
    FIENUP, JR
    [J]. APPLIED OPTICS, 1982, 21 (15): : 2758 - 2769
  • [9] OPTICAL INTERCONNECTIONS FOR VLSI SYSTEMS
    GOODMAN, JW
    LEONBERGER, FJ
    KUNG, SY
    ATHALE, RA
    [J]. PROCEEDINGS OF THE IEEE, 1984, 72 (07) : 850 - 866
  • [10] Gruber M., 1997, MOC/GRIN '97. Technical Digest of the Sixth Microoptics Conference and the Fourteenth Topical Meeting on Gradient-Index Optical Systems, P86