Using partial element equivalent circuit full wave analysis and Pade Via Lanczos to numerically simulate EMC problems

被引:10
作者
Slone, RD [1 ]
Smith, WT [1 ]
Bai, ZJ [1 ]
机构
[1] Univ Kentucky, Dept Elect Engn, Lexington, KY 40506 USA
来源
IEEE 1997 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY - SYMPOSIUM RECORD | 1997年
关键词
D O I
10.1109/ISEMC.1997.667751
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this study, an approach for numerical modeling of transmission line-type interconnects is proposed. In order to achieve the accuracy of a full wave technique, Partial Element Equivalent Circuit (PEEC) analysis is used to model the interconnects. PEEC models do not require transmission lines to be parallel and nonuniform geometrical details can be included. PEEC models for electrically large interconnects, however, generate very large system matrices. Circuit simulations can be overly time consuming if conventional solution algorithms are used. In this study, the solutions are developed using a computationally efficient Pade Via Lanczos (PVL) algorithm. The PVL algorithm is a recently developed approximate method for extracting the dominant poles and residues of the system response. Once the poles and residues have been determined, it is straightforward to evaluate the time or frequency domain responses. In this paper, the particular PEEC modeling approach used to form the system matrices is outlined. A PVL algorithm which incorporates a measure of the error between the actual system response and the approximate system response is used to evaluate the PEEC models. PEEC-PVL simulations of interconnect models are compared to other analysis techniques such as Spice and AWE.
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页码:608 / 613
页数:6
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