Design and Implementation of Fourth Arm for Elimination of Bearing Current in NPC-MLI fed Induction Motor Drive

被引:0
作者
Bharatiraja, C. [1 ]
Munda, J. L. [1 ,2 ]
Raghu, S. [3 ]
Chelliah, Thanga Raj [3 ]
Tariq, Mohd [4 ]
机构
[1] SRM Univ, Dept Elect & Elect Engn, Madras 603203, Tamil Nadu, India
[2] Tshwane Univ Technol, Dept Elect Engn, ZA-0001 Pretoria, South Africa
[3] Indian Inst Technol, Dept Water Resources Dev & Management, Roorkee 247667, Uttar Pradesh, India
[4] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore
来源
2016 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES) | 2016年
关键词
Bearing current; fourth arm circuitry (FAC); Neutral point clamped-multilevel inverter (NPC-MLI); switching states; COMMON-MODE CURRENTS; VOLTAGE; INVERTER; SYSTEMS; FILTER;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
The exploration result on increase in variable drive which creates an impact to prevail on the electric machine failure due to existence of bearing current. The bearing current associated with drive system is concerned about the operating frequencies of the solid state semiconductor switches which may cause the electrostatic charge between stator and rotor which eventually causes damage to windings and bearings. The various techniques comprised in literature to suppress the bearing currents like filter design, switching redundancy, common mode circuitry, isolated grounding scheme and grounding the motor shaft. This paper presents an innovative solution to suppress the bearing current by addition of a fourth arm circuitry to the neutral point of machine to obtain a zero at neutral potential. All the proposed circuitry and algorithm are simulated using MATLAB/Simulink and validation is done through a 2.2kW NPC-MLI laboratory prototype using a Xilinx family SPARTAN-III-3A XC3SD1800A-FG676 DSP-FPGA processor board
引用
收藏
页数:6
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