High performance Si/SiGe pMOSFETs fabricated in a standard CMOS process technology

被引：9
作者：
Collaert, N
Verheyen, P
De Meyer, K
Loo, R
Caymax, M
机构：
[1] IMEC, B-3001 Heverlee, Belgium
[2] Katholieke Univ Leuven, ESAT INSYS, B-3001 Heverlee, Belgium
来源：
SOLID-STATE ELECTRONICS | 2003年 / 47卷 / 07期
关键词：
silicon-germanium; buried channel; pMOSFET;
D O I：
10.1016/S0038-1101(03)00031-5
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a standard CMOS technology is used to fabricate high performance Si/Si0.68Ge0.32 pMOS devices with thin Si cap layers. Careful fine-tuning of the epitaxial growth conditions and pre-epi surface treatment leads to the deposition of high quality facet free epitaxial layers. As compared to Si-only devices, the Si/Si0.68Ge0.32 devices exhibit strongly enhanced mobilities. For the best devices an increase by a factor of 2.5 can be seen. This enhanced mobility behaviour results in a strong increase of the on-state current and transconductance for devices with a gate length down to 0.13 mum. (C) 2003 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码：1173 / 1177
页数：5
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