RevSCA-2.0: SCA-Based Formal Verification of Nontrivial Multipliers Using Reverse Engineering and Local Vanishing Removal

被引:13
作者
Mahzoon, Alireza [1 ]
Grosse, Daniel [2 ]
Drechsler, Rolf [1 ]
机构
[1] Univ Bremen, Inst Comp Sci, D-28359 Bremen, Germany
[2] Johannes Kepler Univ Linz, Inst Complex Syst, A-4040 Linz, Austria
关键词
Logic gates; Reverse engineering; Computer architecture; Explosions; Adders; Delays; Wiring; Formal verification; multiplier; reverse engineering; symbolic computer algebra (SCA); vanishing monomial; ARITHMETIC CIRCUITS;
D O I
10.1109/TCAD.2021.3083682
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The formal verification of integer multipliers is one of the important but challenging problems in the verification community. Recently, the methods based on symbolic computer algebra (SCA) have shown very good results in comparison to all other existing proof techniques. However, when it comes to verification of huge and structurally complex multipliers, they completely fail as an explosion happens in the number of monomials. The reason for this explosion is the generation of redundant monomials known as vanishing monomials. This article introduces the SCA-based approach RevSCA-2.0 that combines reverse engineering and local vanishing removal to verify large and nontrivial multipliers. For our approach, we first come up with a theory for the origin of vanishing monomials, i.e., we prove that the gates/nodes where both outputs of half adders (HAs) converge are the origins of vanishing monomials. Then, we propose a dedicated reverse engineering technique to identify atomic blocks including HAs. The identified HAs are the basis for detecting converging cones and locally removing vanishing monomials, which finally results in a vanishing-free global backward rewriting. The efficiency of RevSCA-2.0 is demonstrated using an extensive set of multipliers with up to several million gates.
引用
收藏
页码:1573 / 1586
页数:14
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