Nonlinear Behavior Study in Digital Bang-Bang PLL

被引：2
|
作者：
Vareljian, A. [1 ]
Moussavi, M. [1 ]
Bereza, W. [1 ]
Fergusson, W. [1 ]
Berndt, C. [1 ]
Patel, R. H. [1 ]
机构：
[1] Altera Corp, San Jose, CA 95134 USA
来源：
PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2009年
关键词：
D O I：
10.1109/CICC.2009.5280834
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A simple high-performance nonlinear digital PLL is fabricated in 90 nm CMOS with operating range of 0.5 to 3.25 GHz and 1.24 ps jitter. New insights into the PLL behavior are discussed. The classical "20Log" in-band phase noise tracking does not hold for the type of nonlinear digital loops.
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页码：339 / 342
页数：4
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