Timing issues in system-level design

被引:2
作者
Dasdan, A [1 ]
Gupta, RK [1 ]
机构
[1] Univ Illinois, Dept Comp Sci, Urbana, IL 61801 USA
来源
IEEE COMPUTER SOCIETY WORKSHOP ON VLSI '98 - SYSTEM LEVEL DESIGN, PROCEEDINGS | 1998年
关键词
D O I
10.1109/IWV.1998.667136
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present our view of the high-level timing issues in the design and validation of embedded real-time systems. We first define the derivation problem: the problem of deriving internal timing constraints from external timing constraints in an embedded real-time system. We then give a comprehensive classification of timing constraints, discuss the stare of the art on high-level system modeling and on the timing constraint derivation techniques. We finally give some pointers for future research.
引用
收藏
页码:124 / 129
页数:6
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