Hardware acceleration of matrix multiplication on a Xilinx FPGA

被引：20
|
作者：
Dave, Nirav [1 ]
Fleming, Kermin [1 ]
King, Myron [1 ]
Pellauer, Michael [1 ]
Vijayaraghavan, Muralidaran [1 ]
机构：
[1] MIT, Comp Sci & Artificial Intelligence Lab, Cambridge, MA 02139 USA
来源：
MEMOCODE'07: FIFTH ACM & IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS | 2007年
关键词：
D O I：
10.1109/MEMCOD.2007.371239
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：97 / +
页数：2
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