The Future of PCB Diagnostics and Trouble-shooting

被引:0
|
作者
Sabapathi, S. R. [1 ]
机构
[1] Qmax Test Technol Pvt Ltd, Chennai, Tamil Nadu, India
来源
关键词
JTAG - Joint Test Action Group; JEDEC - Joint Electron Device Engineering Council; SoC - System on Chip; ASIC - Application Specific Integrated Circuit;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Any PCB manufactured needs to be tested fully for its functionality at the production site and to be maintained for its life time with minimum effort and expense for a product to be commercially successful. This paper presents the techniques and equipment that were used in fault diagnosis and identifying of the faulty components in an electronic Printed circuit board (PCB) in the past and present. With present day technology of high density - high pin count ASIC / FPGA chip sets and SOIC devices, it becomes highly challenging for the test and maintenance engineer to trouble-shoot and to identify faults at component level using the present-day techniques and equipment. The economics may not allow to replace the entire circuit board especially in cases of highly expensive defence electronic products. Even up keeping an inventory of spare boards for many years is a challenge. Component obsolescence and OEM shutting down support is yet another problem. So, what is the future of PCB trouble-shooting and component level maintenance? This paper suggests various trouble-shooting techniques and equipment that can help a component level maintenance. One such future solution could be embedding functional self-tests into every device a PCB assembly holds and they are checked by a simple JTAG command
引用
收藏
页码:59 / 68
页数:10
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