A unified model for injection-locked frequency dividers

被引:182
作者
Verma, S [1 ]
Rategh, HR [1 ]
Lee, TH [1 ]
机构
[1] Ctr Integrated Syst, Stanford, CA 94305 USA
关键词
CMOS analog integrated circuits; frequency dividers; injection locking; locking range; loop bandwidth; oscillators; phase noise; phase-locked loops (PLLs);
D O I
10.1109/JSSC.2003.811975
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Injection-locked frequency dividers (ILFDs) are versatile analog circuit blocks used, for example, within phase-locked loops (PLLs). An important attribute is substantially lower power consumption relative to their digital counterparts. The model described in this paper unifies the treatment of injection-locked and regenerative systems. It also provides useful design insights by clarifying the nature and role of the nonlinearity present in many mixer-based frequency conversion circuits. The utility of the model is demonstrated in the calculation of both the steady-state and dynamic properties of ILFD systems, and the subsequent computation of the corresponding phase noise spectrum. Illustrative circuit examples show close correspondence between theory and simulation. Finally, measurement results from a 5.4-GHz divide-by-2 ELFD fabricated in 0.24-mum CMOS show close correspondence between experiment and theory.
引用
收藏
页码:1015 / 1027
页数:13
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