Growth mechanism of epitaxial SrTiO3 on a (1 x 2) + (2 x 1) reconstructed Sr(1/2 ML)/Si(001) surface

被引:14
作者
Spreitzer, Matjaz [1 ]
Klement, Dejan [1 ,7 ]
Egoavil, Ricardo [2 ]
Verbeeck, Jo [2 ]
Kovac, Janez [3 ]
Zaloznik, Anze [4 ]
Koster, Gertjan [1 ,5 ,6 ]
Van Tendeloo, Gustaaf [2 ]
Suvorov, Danilo [1 ]
Rijnders, Guus [5 ,6 ]
机构
[1] Jozef Stefan Inst, Adv Mat Dept, Jamova 39, Ljubljana 1000, Slovenia
[2] Univ Antwerp, Electron Microscopy Mat Sci, Groenenborgerlaan 171, B-2020 Antwerp, Belgium
[3] Jozef Stefan Inst, Dept Surface Engn & Optoelect, Jamova 39, Ljubljana 1000, Slovenia
[4] Jozef Stefan Inst, Dept Low & Medium Energy Phys, Jamova 39, Ljubljana 1000, Slovenia
[5] Univ Twente, Fac Sci & Technol, Carre 3243, NL-7500 AE Enschede, Netherlands
[6] Univ Twente, MESA Inst Nanotechnol, Carre 3243, NL-7500 AE Enschede, Netherlands
[7] Krka Dd, Novo Mesto, Slovenia
关键词
PULSED-LASER DEPOSITION; THIN-FILMS; IN-SITU; SILICON; INTERFACE; OXIDES; TARGET;
D O I
10.1039/c9tc04092g
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Sub-monolayer control over the growth at silicon-oxide interfaces is a prerequisite for epitaxial integration of complex oxides with the Si platform, enriching it with a variety of functionalities. However, the control over this integration is hindered by the intense reaction of the constituents. The most suitable buffer material for Si passivation is metallic strontium. When it is overgrown with a layer of SrTiO3 (STO) it can serve as a pseudo-substrate for the integration with functional oxides. In our study we determined a mechanism for epitaxial integration of STO with a (1 x 2) + (2 x 1) reconstructed Sr(1/2 ML)/Si(001) surface using all-pulsed laser deposition (PLD) technology. A detailed analysis of the initial deposition parameters was performed, which enabled us to develop a complete protocol for integration, taking into account the peculiarities of the PLD growth, STO critical thickness, and process thermal budget, in order to kinetically trap the reaction between STO and Si and thus to minimize the thickness of the interface layer. The as-prepared oxide layer exhibits STO(001)8Si(001) out-of-plane and STO[110]8Si[100] in-plane orientation and together with recent advances in large-scale PLD tools these results represent a new technological solution for the implementation of oxide electronics on demand.
引用
收藏
页码:518 / 527
页数:10
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