TI unveils new digital signal processor architecture

被引：0
|
作者：
不详
机构：
来源：
CONTROL ENGINEERING | 1998年 / 45卷 / 06期
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：40 / 40
页数：1
相关论文
共 50 条
  • [1] A new processor architecture for digital signal transport systems
    Inamori, M
    Ishii, K
    Tsutsui, A
    Shirakawa, K
    Miyazaki, T
    Nakada, H
    IEICE TRANSACTIONS ON ELECTRONICS, 1998, E81C (09): : 1408 - 1415
  • [2] A new generalized reconfigurable architecture for digital signal processor
    Basu, Joyanta
    Sahidullah, Md.
    Sinha, Amitabha
    ADCOM 2007: PROCEEDINGS OF THE 15TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING AND COMMUNICATIONS, 2007, : 333 - 338
  • [3] A new processor architecture for digital signal transport systems
    Inamori, M
    Ishii, K
    Tsutsui, A
    Shirakawa, K
    Nakada, H
    Miyazaki, T
    INTERNATIONAL CONFERENCE ON COMPUTER DESIGN - VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1997, : 157 - 162
  • [4] ARCHITECTURE OF A PROGRAMMABLE DIGITAL SIGNAL PROCESSOR
    SHIVELY, RR
    IEEE TRANSACTIONS ON COMPUTERS, 1982, 31 (01) : 16 - 22
  • [5] DESIGN AND EVALUATION OF AN ARCHITECTURE FOR A DIGITAL SIGNAL PROCESSOR FOR INSTRUMENTATION APPLICATIONS
    FELLMAN, RD
    KANESHIRO, RT
    KONSTANTINIDES, K
    IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1990, 38 (03): : 537 - 546
  • [6] A VIDEO DIGITAL SIGNAL PROCESSOR WITH A VECTOR-PIPELINE ARCHITECTURE
    AONO, K
    TOYOKURA, M
    ARAKI, T
    OHTANI, A
    KODAMA, H
    OKAMOTO, K
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (12) : 1886 - 1894
  • [7] DIGITAL SIGNAL PROCESSOR
    TSUDA, T
    GAMBE, H
    HOSHIKAWA, R
    FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 1989, 25 (03): : 171 - 193
  • [8] SPVA: A novel digital signal processor architecture for Software Defined Radio
    Fang, Xing
    Wang, Dong
    Chen, Shuming
    2008 IEEE/ACS INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND APPLICATIONS, VOLS 1-3, 2008, : 856 - 859
  • [9] REAL-TIME PROGRAMMABLE PARALLEL DIGITAL SIGNAL PROCESSOR ARCHITECTURE
    BARR, PC
    BRESSEL, JG
    HARRIS, JD
    VALAS, CJ
    CA-DSP 89, VOLS 1 AND 2: 1989 INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND DIGITAL SIGNAL PROCESSING, 1989, : 558 - 562
  • [10] Reconfigurable Architecture: An Approach to Design Low Power Digital Signal Processor
    Khera, Preeti
    Kumar, Ashok
    Singh, Sukhwinder
    Semwal, Sunil
    INTERNATIONAL CONFERENCE ON METHODS AND MODELS IN SCIENCE AND TECHNOLOGY (ICM2ST-10), 2010, 1324 : 433 - 437
12345