RAMP Gold: An FPGA-based Architecture Simulator for Multiprocessors

被引：0

作者：

Tan, Zhangxi ^{[1
]}

Waterman, Andrew ^{[1
]}

Avizienis, Rimas ^{[1
]}

Lee, Yunsup ^{[1
]}

Cook, Henry ^{[1
]}

Patterson, David ^{[1
]}

Asanovic, Krste ^{[1
]}

机构：

[1] Univ Calif Berkeley, Dept EECS, CS Div, Parallel Comp Lab, Berkeley, CA 94720 USA

来源：

PROCEEDINGS OF THE 47TH DESIGN AUTOMATION CONFERENCE | 2010年

关键词：

Multiprocessors; FPGA; Simulation;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throughput, cycle-accurate full-system simulator that runs on a single Xilinx Virtex-5 FPGA board, and which simulates a 64-core shared-memory target machine capable of booting real operating systems. To improve FPGA implementation efficiency, functionality and timing are modeled separately and host multithreading is used in both models. We evaluate the prototype's performance using a modern parallel benchmark suite running on our manycore research operating system, achieving two orders of magnitude speedup compared to a widely-used software-based architecture simulator.

引用

页码：463 / 468

页数：6

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