A Fast and Robust Grid Synchronization Algorithm of a Three-phase Converters under Unbalanced and Distorted Utility Voltages

被引:1
作者
Kim, Kwang-Seob [1 ]
Hyun, Dong-Seok [1 ]
Kim, Rae-Yong [1 ]
机构
[1] Hanyang Univ, Dept Elect Engn, Seoul, South Korea
关键词
Three-phase power converter; Grid synchronization; Phase locked loop(PLL); Enhanced second order generalized integrator(ESOGI); REFERENCE FRAME PLL; POWER; SYSTEM;
D O I
10.5370/JEET.2017.12.3.1101
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a robust and fast grid synchronization method of a three-phase power converter is proposed. The amplitude and phase information of grid voltages are essential for power converters to be properly connected into the utility. The phase-lock-loop in synchronous reference frame has been widely adopted for the three-phase converter system since it shows a satisfactory performance under balanced grid voltages. However, power converters often operate under abnormal grid conditions, i.e. unbalanced by grid faults and frequency variations, and thus a proper active and reactive power control cannot be guaranteed. The proposed method adopts a second order generalized integrator in synchronous reference frame to detect positive sequence components under unbalanced grid voltages. The proposed method has a fast and robust performance due to its higher gain and frequency adaptive capability. Simulation and experimental results show the verification of the proposed synchronization algorithm and the effectiveness to detect positive sequence voltage.
引用
收藏
页码:1101 / 1107
页数:7
相关论文
共 13 条
[1]  
Arruda LN, 2001, IEEE IND APPLIC SOC, P2655, DOI 10.1109/IAS.2001.955993
[2]   Overview of control and grid synchronization for distributed power generation systems [J].
Blaabjerg, Frede ;
Teodorescu, Remus ;
Liserre, Marco ;
Timbus, Adrian V. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2006, 53 (05) :1398-1409
[3]   A phase tracking system for three phase utility interface inverters [J].
Chung, SK .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2000, 15 (03) :431-438
[4]   A method for synchronization of power electronic converters in polluted and variable-frequency environments [J].
Karimi-Ghartemani, M ;
Iravani, MR .
IEEE TRANSACTIONS ON POWER SYSTEMS, 2004, 19 (03) :1263-1270
[5]  
Kaura V, 1996, APPL POWER ELECT CO, P703, DOI 10.1109/APEC.1996.500517
[6]  
Lee S. J., 1999, P IND APPL C 34 IAS, V4, P2167
[7]  
Rodríguez P, 2006, IEEE POWER ELECTRON, P692
[8]   Double synchronous reference frame PLL for power converters control [J].
Rodríguez, P ;
Pou, J ;
Bergas, J ;
Candela, I ;
Burgos, R ;
Boroyevich, D .
2005 IEEE 36TH POWER ELECTRONIC SPECIALISTS CONFERENCE (PESC), VOLS 1-3, 2005, :1415-1421
[9]   Decoupled double synchronous reference frame PLL for power converters control [J].
Rodriguez, Pedro ;
Pou, Josep ;
Bergas, Joan ;
Candela, J. Ignacio ;
Burgos, Rolando P. ;
Boroyevich, Dushan .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2007, 22 (02) :584-592
[10]   Comparison of three single-phase PLL algorithms for UPS applications [J].
Santos Filho, Rubens M. ;
Seixas, Paulo F. ;
Cortizo, Porfirio C. ;
Torres, Leonardo A. B. ;
Souza, Andre F. .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2008, 55 (08) :2923-2932