Stable charge storing in two-dimensional MoS2 nanoflake floating gates for multilevel organic flash memory

被引:68
作者
Kang, Minji [1 ]
Kim, Yeong-A. [1 ]
Yun, Jin-Mun [2 ]
Khim, Dongyoon [1 ]
Kim, Jihong [1 ]
Noh, Yong-Young [3 ]
Baeg, Kang-Jun [4 ]
Kim, Dong-Yu [1 ]
机构
[1] GIST, Heeger Ctr Adv Mat, Kwangju 500712, South Korea
[2] KAERI, Radiat Res Div Ind & Environm, Jeollabuk Do 580185, South Korea
[3] Dongguk Univ, Dept Energy & Mat Engn, Seoul 100715, South Korea
[4] KERI, Nano Carbon Mat Res Grp, Chang Won 642120, Gyeongsangnamdo, South Korea
基金
新加坡国家研究基金会;
关键词
FIELD-EFFECT TRANSISTORS; SINGLE-LAYER MOS2; BLOCK-COPOLYMER; MONOLAYER MOS2; NANOPARTICLES; ELECTRONICS; RAMAN; PHOTOLUMINESCENCE; HETEROSTRUCTURES; EXFOLIATION;
D O I
10.1039/c4nr03448a
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
In this study, we investigated chemically exfoliated two-dimensional (2-D) nanoflakes of molybdenum disulfide (MoS2) as charge-storing elements for use in organic multilevel memory devices (of the printed/flexible non-volatile type) based on organic field-effect transistors (OFETs) containing poly(3-hexylthiophene) (P3HT). The metallic MoS2 nanoflakeswere exfoliated in 2-methoxyethanol by the lithium intercalation method and were deposited as nano-floating gates between polystyrene and poly(methyl methacrylate), used as bilayered gate dielectrics, by a simple spin-coating and low temperature (<150 degrees C) process. In the developed OFET memory devices, electrons could be trapped/detrapped in the MoS2 nano-floating gates by modulating the charge carrier density in the active channel through gate bias control. Optimal memory characteristics were achieved by controlling the thickness and concentration of few-layered MoS2 nanoflakes, and the best device showed reliable non-volatile memory properties: a sufficient memory window of similar to 23 V, programming-reading-erasing cycling endurance of >10(2) times, and most importantly, quasi-permanent charge-storing characteristics, i.e., a very long retention time (longer than the technological requirement of commercial memory devices (>10 years)). In addition, we successfully developed multilevel memory cells (2 bits per cell) by controlling the gate bias magnitude.
引用
收藏
页码:12315 / 12323
页数:9
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