A novel low-power bus design for bus-invert coding

被引：5

作者：

Yoon, Myungchul ^{[1
]}

Roh, Byeong-Hee

机构：

[1] Dankook Univ, Dept Elect Engn, Cheonan 330714, Choong Nam, South Korea

[2] Ajou Univ, Grad Sch Informat & Commun, Suwon 443749, Kyeonggi, South Korea

来源：

IEICE TRANSACTIONS ON ELECTRONICS | 2007年 / E90C卷 / 04期

关键词：

NIL-BIC; flip-driver; low-power bus scheme; bus-invert coding;

D O I：

10.1093/ietele/e90-c.4.731

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter presents a novel implementation for Bus-Invert Coding called No Invert-Line Bus-Invert Coding (NIL-BIC) architecture. It not only removes the invert-lines used in previous BIC implementations, but sends the coding information without additional bus-transitions. NIL-BIC can save about 50% more bus-power than the implementations using invert-line.

引用

页码：731 / 734

页数：4

共 50 条

[41] SIGNAL TRANSFORMS WITH BUS INVERT ENCODING FOR LOW POWER APPLICATIONS
Patil, Karnakar
Madabal, Sachin
Motagi, Abhishek
PROCEEDINGS OF THE 10TH INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS AND CONTROL (ISCO'16), 2016,
[42] Preceded two-dimensional coding method for low-power serial bus
Shin, Y
Jeong, DK
ELECTRONICS LETTERS, 1999, 35 (18) : 1524 - 1526
[43] LOW-POWER INSTRUCTION ADDRESS BUS CODING WITH XOR-BITS ARCHITECTURE
Fan, Chih-Peng
Fang, Chia-Hao
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2009, 18 (01) : 45 - 57
[44] Graph-based codeword selection for memoryless low-power bus coding
Gustafsson, O
ELECTRONICS LETTERS, 2004, 40 (24) : 1531 - 1532
[45] Serial-Link Bus: A Low-Power On-Chip Bus Architecture
Ghoneima, Maged
Ismail, Yehea
Khellah, Muhammad M.
Tschanz, James
De, Vivek
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2009, 56 (09) : 2020 - 2032
[46] An optimization of bus interconnects pitch for Low-power and reliable bus encoding schemea
Komatsu, Satoshi
Fujita, Masahiro
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 1723 - +
[47] Serial-link bus: A low-power on-chip bus architecture
Ghoneima, M
Ismail, Y
Khellah, M
Tschanz, J
De, VV
ICCAD-2005: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, 2005, : 541 - 546
[48] Deep sub-micron bus invert coding
Lindkvist, T
Löfvenberg, J
Gustafsson, O
NORSIG 2004: PROCEEDINGS OF THE 6TH NORDIC SIGNAL PROCESSING SYMPOSIUM, 2004, 46 : 133 - 136
[49] Minimal redundancy, low power bus coding
Lindkvist, Tina
Lofvenberg, Jacob
NORCHIP 2005, PROCEEDINGS, 2005, : 277 - 280
[50] Serial low power bus coding for VLSI
Kuo, Chih-Hung
Wu, Wey-Bang
Wu, Yi-Jang
Lin, Jia-Hung
2006 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1-4: VOL 1: SIGNAL PROCESSING, 2006, : 2449 - 2453

← 1 2 3 4 5 →