Test Point Insertion Using Functional Flip-Flops to Drive Control Points

被引:0
作者
Yang, Joon-Sung [1 ]
Nadeau-Dostie, Benoit [2 ]
Touba, Nur A. [1 ]
机构
[1] Univ Texas Austin, Dept Elect & Comp Engn, Comp Engn Res Ctr, Austin, TX 78712 USA
[2] Log Vis Inc, San Jose, CA 95110 USA
来源
ITC: 2009 INTERNATIONAL TEST CONFERENCE | 2009年
关键词
CIRCUITS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a novel method for reducing the area overhead introduced by test point insertion. Test point locations are calculated as usual using a commercial tool. However, the proposed method uses functional flip-flops to drive control test points instead of test-dedicated flip-flops. Logic cone analysis that considers the distance and path inversion parity from candidate functional flip-flops to each control point is used to select an appropriate functional flip-flop to drive the control point which avoids adding additional timing constraints. Reconvergence is also checked to avoid degrading the testability. Experimental results indicate that the proposed method significantly reduces test point area overhead and achieves essentially the same fault coverage as the implementations using dedicated flip-flops driving the control points.
引用
收藏
页码:491 / +
页数:2
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