Electrical characterization of copper interconnects with end-of-roadmap feature sizes

被引:42
作者
Schindler, G
Steinlesberger, G
Engelhardt, M
Steinhögl, W
机构
[1] Infineon Technol, Corp Res, D-81739 Munich, Germany
[2] Vienna Univ Technol, Inst Festkorperelekt, A-1040 Vienna, Austria
关键词
interconnect; Cu-damascene; resistivity; size effect; temperature dependence; maximum current density;
D O I
10.1016/S0038-1101(03)00042-X
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The metallization of trenches with end-of-roadmap feature sizes using a damascene approach is demonstrated. By applying an adapted spacer technique, narrow trenches were fabricated in an oxide-based intermetal dielectric, filled with barrier metal and Cu and subsequent CMP of the copper/barrier bi-layer. Thus damascene metal lines with widths down to 40 nm and aspect ratios exceeding 4 could be fabricated. These metal lines could be characterized electrically up to a length of almost 10 cm. The data show an increase of resistivity for small line widths, which can be explained by surface scattering. The surface effects can also be seen in the temperature dependence of the resistance. The maximum current density was shown to exceed those of todays interconnect lines by a factor of 2, exceeding the ITRS requirements for the maximum current density of such structures. (C) 2003 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1233 / 1236
页数:4
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