Switched Capacitor Based Boost Multilevel Inverters: Design Criterion and Limitations

被引:0
作者
Ramaiah, Satish [1 ]
Narasamma, Lakshmi N. [1 ]
Mishra, Mahesh Kumar [1 ]
机构
[1] Indian Inst Technol Madras, Dept Elect Engn, Chennai, Tamil Nadu, India
来源
2019 NATIONAL POWER ELECTRONICS CONFERENCE (NPEC) | 2019年
关键词
Switched capacitor based converter; multilevel inverter; capacitor energy utilization; MODULE; TOPOLOGIES; CONVERTER;
D O I
10.1109/npec47332.2019.9034772
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, the design criterion considered for switched capacitor based boost multilevel inverters (SCBMLI) is presented. Variants of SCBMLI topology is proposed in literature for several applications. In this paper, evaluation of the SCBMLI variant and PWM technique selected for an application is done by defining a parameter called capacitor energy utilization factor. This factor is the ratio of charging and discharging energies calculated analytically from the given parameters of the topology and the components employed. Generalized analytical model for the above factor is derived. The proposed model for a variant of SCBMLI topology is verified in simulations. Basic considerations for designing and selecting a SCBMLI topology and semiconductor devices are presented. Limitations of the design methodologies available in the literature are explained. The effect of capacitor charging interval and non-idealities of the components (Rds, on and RESR) on the converter behavior is explained. The limitations of the SCBMLI topologies and their design criterion are discussed through analytical and simulation results.
引用
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页数:6
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