Ultra-thin decoupled plasma nitridation (DPN) oxynitride gate dielectric for 80-nm advanced technology

被引:35
作者
Tseng, HH [1 ]
Jeon, Y
Abramowitz, P
Luo, TY
Hebert, L
Lee, JJ
Jiang, J
Tobin, PJ
Yeap, GCF
Moosa, M
Alvis, J
Anderson, SGH
Cave, N
Chua, TC
Hegedus, A
Miner, G
Jeon, J
Sultan, A
机构
[1] Motorola Inc, Adv Prod Res & Dev Lab, DigitalDNA Labs, Austin, TX 78721 USA
[2] AMAT, Santa Clara, CA 95054 USA
[3] Adv Micro Devices Inc, Sunnyvale, CA 94088 USA
关键词
decoupled plasma nitridation; gate dielectric; gate leakage; pMOSFET; reliability; transconductance;
D O I
10.1109/LED.2002.805758
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Balancing gate leakage reduction, device performance, and gate dielectric reliability is a major challenge for oxynitride used as a gate dielectric for advanced technology. As compared to RTONO oxynitride, pMOSFET threshold voltage shift and transconductance degradation have been problematic for devices using remote plasma nitridation (RPN) or decoupled plasma nitridation (DPN) process due to non-optimal nitrogen profile in the film. In this paper, we report that the nitrogen profile of DPN gate dielectric can be engineered primarily,by tuning the plasma pressure after optimizing other DPN process parameters to solve these problems. An EOT of 15 Angstrom (23-Angstrom NMOS CETinv) DPN oxynitride is demonstrated to have an acceptable pMOS Vt, comparable transconductance, significantly (similar to30x) longer pMOS time-to-breakdown reliability for packaged devices, and 5 x gate leakage reduction relative to a high quality RTONO used in industry. The high quality ultrathin DPN film is fabricated in a commercially available system, which is compatible with standard CMOS processing technology. These encouraging results make high-pressure DPN oxynitride an attractive gate dielectric candidate for 80-nm advanced technology and beyond.
引用
收藏
页码:704 / 706
页数:3
相关论文
共 5 条
  • [1] Device performance of in situ steam generated gate dielectric nitrided by remote plasma nitridation
    Al-Shareef, HN
    Karamcheti, A
    Luo, TY
    Bersuker, G
    Brown, GA
    Murto, RW
    Jackson, MD
    Huff, HR
    Kraus, P
    Lopes, D
    Olsen, C
    Miner, G
    [J]. APPLIED PHYSICS LETTERS, 2001, 78 (24) : 3875 - 3877
  • [2] Making silicon nitride film a viable gate dielectric
    Ma, TP
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (03) : 680 - 690
  • [3] Extending the reliability scaling limit of SiO2 through plasma nitridation
    Nicollian, PE
    Baldwin, GC
    Eason, KN
    Grider, DT
    Hattangady, SV
    Hu, JC
    Hunter, WR
    Rodder, M
    Rotondaro, ALP
    [J]. INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, : 545 - 548
  • [4] Ultra thin (<20Å) CVD Si3N4 gate dielectric for deep-sub-micron CMOS devices
    Song, SC
    Luan, HF
    Chen, YY
    Gardner, M
    Fulford, J
    Allen, M
    Kwong, DL
    [J]. INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 373 - 376
  • [5] TSENG HH, 1988, IEDM TECH DIG, P793