Effects of Discretization on Virtual Positive Damping Region of Capacitor Current Feedback Active Damping with Phase Lead Compensator

The capacitor current feedback active damping (CCFAD) is preferred to dampen the resonance and assure stability in the grid current control of the LCL grid connected inverter (LCL-GCI). However, the digital realization of proportional CCFAD restricts the virtual positive resistance region (VPRR) up to one-sixth of the sampling frequency. Theoretically, including a phase lead compensator (PLC) in the capacitor current feedback path can augment the VPRR to one-third of the sampling frequency. The astute methodology for realizing the active damping is to design PLC in the continuous domain before executing in a discrete environment. Nevertheless, the discrete realization face issues of errors in gain and phase; hence discrepancies between theoretical and real-time simulation results may arise. This article compares different discretization methods for the PLC and demonstrates their impact on the VPRR of CCFAD based LCL-GCI operation. The pre-warped Tustin discretization rule is observed as the best way to retain the PLC's gain and phase characteristics at the VPRR boundary. The real-time simulation results are presented to prove the effectiveness of the theoretical analysis.