Efficient FPGA implementation and verification of difference expansion based reversible watermarking with improved time and resource utilization

This paper presents Xilinx System Generator (XSG) model design for realization of reversible watermarking algorithm using Difference Expansion (DE) approach in System-On-Chip (SoC) Field Programmable Gate Array (FPGA) environment. The reversible watermarking is verified by taking a (4 x 4) sized test image and is applicable for larger sizes of cover images. The outcomes of the result demonstrate that the proposed structural design allows combining MATLAB-Simulink and XSG during graphical user interface for image processing applications. The superiority of the algorithm is justified by using comparative analysis with some well-known methods in both software and hardware environments. The method provides effectively higher PSNR at higher embedding capacity. It is also found that the method requires less time and hardware resources with throughput of 13.516 Mb/s at operational frequency of 80 MHz for real time implementation using FPGA.