High-Performance Double Node Upset-Tolerant Non-Volatile Flip-Flop Design

Emerging spin-based devices are introduced as an intriguing candidate to alleviate leakage currents and continue the scalability of CMOS technology. However, their immunity to radiation-induced transient faults needs to be adequately addressed. In this work, a radiation-immune hybrid Spin Transfer Torque Magnetic Tunnel Junction (STT-MTJ)/CMOS flipflop is designed and evaluated for nonvolatile applications. The proposed nonvolatile flip-flop circuit achieves attractive features, such as low standby power dissipation (21% less than CMOS-based design), high computing performance, and superior softerror resilience (concurrently can tolerate DNU) to potentially become as a mainstream solution for the aerospace and avionic nanoelectronics.