A novel approach to IDDQ testing of mixed-signal integrated circuits

被引:0
作者
Srivastava, A [1 ]
Aluri, S [1 ]
机构
[1] Louisiana State Univ, Dept Elect & Comp Engn, Baton Rouge, LA 70803 USA
来源
2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS | 2002年
关键词
built-in current sensor; current testing; I-DDQ testing; circuit under test; reliability;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents an effective built-in current sensor (BICS), which has a very small impact on the performance of the circuit under test (CUT). The proposed BICS works in two-modes the normal mode and the test mode. In the normal mode, the BICS is isolated from the CUT due to which there is no performance degradation of the CUT. In the testing mode, our BICS detects the abnormal current caused by permanent manufacturing defects. Furthermore, our BICS can also distinguish the type of defect induced (gate-source short, source-drain short and drain-gate short). Our BICS requires neither an external voltage source nor current source. Hence the BICS requires less area and is more efficient than the conventional current sensors. The circuit under test is a 10-bit digital-to-analog converter using charge-scaling architecture.
引用
收藏
页码:270 / 273
页数:4
相关论文
共 14 条
  • [1] Baker R.J., 2019, CMOS: Circuit Design, Layout, and Simulation
  • [2] HORMONAL AND EXPERIENTIAL FACTORS INFLUENCING PARENTAL BEHAVIOR IN MALE RODENTS - AN INTEGRATIVE APPROACH
    BROWN, RE
    [J]. BEHAVIOURAL PROCESSES, 1993, 30 (01) : 1 - 28
  • [3] 2 SCHEMES FOR DETECTING CMOS ANALOG FAULTS
    CHANG, TY
    WANG, CC
    HSU, JB
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (02) : 229 - 233
  • [4] NOVEL DESIGN FOR TESTABILITY SCHEMES FOR CMOS IC
    FAVALLI, M
    OLIVO, P
    DAMIANI, M
    RICCO, B
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (05) : 1239 - 1246
  • [5] HSUE CW, 1993, INTERNATIONAL TEST CONFERENCE 1993 PROCEEDINGS, P635, DOI 10.1109/TEST.1993.470640
  • [6] Kim JB, 1998, IEEE J SOLID-ST CIRC, V33, P1266, DOI 10.1109/4.705368
  • [7] BUILT-IN CURRENT TESTING
    MALY, W
    PATYRA, M
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1992, 27 (03) : 425 - 428
  • [8] Maly W., 1992, Journal of Electronic Testing: Theory and Applications, V3, P397, DOI 10.1007/BF00135343
  • [9] Miura Y., 1992, Proceedings International Test Conference 1992 (Cat. No.92CH3191-4), P873, DOI 10.1109/TEST.1992.527913
  • [10] NIGH P, 1989, P IEEE CUST INT CIRC