A 15.6 dBm Psat, 24 dB Gain, 24.4%PAF, Linear CMOS Power Amplifier for 5G Application

被引：0

作者：

Rao, Li ^{[1
]}

Feng, Haigang ^{[1
]}

Xing, Xinpeng ^{[1
]}

Tani, Yulin ^{[2
]}

机构：

[1] Tsinghua Univ, Grad Sch Shenzhen, Shenzhen Key Lab Informat Sci & Technol, Shenzhen 518055, Peoples R China

[2] Radiawave Technol Co Ltd, Shenzhen 518055, Peoples R China

来源：

2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2019年

关键词：

65nm CMOS; power amplifier; tranformer coupling; 5G;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a 26GHz power amplifier for high band 5G application in 65nm CMOS technology. By using three stage differential common source topology plus final four-way power combiner, 24dB gain of PA is achieved at millimeter wave frequency. Capacitors, Complicated inductors and transformers scheme provide good matching for input, inter stage and output at 26GHz hand. Simulation results demonstrate the PA with P-sat of 15.6 dBm, OP1dB of 13.3 dBm, and peak PAE of 24.44%. Its-3dB bandwidth covers 4GHz, with better than 10dB input/output return loss across hand. It consumes 74mA from a 1.5V supply.

引用

页数：3

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