A novel, coupling driven, low power bus coding technique for minimizing capacitive crosstalk in VLSI interconnects

In current VLSI technology, interconnects have become the predominant source of power dissipation. Particularly in DSM technology, the spacing between interconnects is very less leading to the dominance of coupling capacitance over self capacitance. In 0.13 mu m technology, it has been found that 75% of the power consumption is due to the coupling capacitance whereas only 25% is due to self capacitance. Thus, earlier schemes which concentrated on minimizing the substrate capacitances are not valid in these buses. Considering these aspects, this paper proposes a novel encoding technique that reduces the switching activity due to capacitive coupling resulting in lower power overhead. The simulation results show that the power dissipation in a bus is reduced by about 23% with this encoding technique. The encoding and decoding circuits have been designed and the power consumed has been compared with those of other coding schemes.