Multimodal background subtraction for high-performance embedded systems

被引:8
作者
Cocorullo, Giuseppe [1 ]
Corsonello, Pasquale [1 ]
Frustaci, Fabio [1 ]
Guachi-Guachi, Lorena-de-los-Angeles [1 ]
Perri, Stefania [1 ]
机构
[1] Univ Calabria, DIMES, Dept Informat Modeling Elect & Syst Engn, Arcavacata Di Rende, Italy
关键词
Image processing; Video systems; Background subtraction; FOREGROUND DETECTION; SEGMENTATION; ALGORITHM; TRACKING; ROBUST; MODEL;
D O I
10.1007/s11554-016-0651-6
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In many computer vision systems, background subtraction algorithms have a crucial importance to extract information about moving objects. Although color features have been extensively used in several background subtraction algorithms, demonstrating high efficiency and performances, in actual applications the background subtraction accuracy is still a challenge due to the dynamic, diverse and complex background types. In this paper, a novel method for the background subtraction is proposed to achieve low computational cost and high accuracy in real-time applications. The proposed approach computes the background model using a limited number of historical frames, thus resulting suitable for a real-time embedded implementation. To compute the background model as proposed here, pixels grayscale information and color invariant H are jointly exploited. Differently from state-of-the-art competitors, the background model is updated by analyzing the percentage changes of current pixels with respect to corresponding pixels within the modeled background and historical frames. The comparison with several traditional and real-time state-of-the-art background subtraction algorithms demonstrates that the proposed approach is able to manage several challenges, such as the presence of dynamic background and the absence of frames free from foreground objects, without undermining the accuracy achieved. Different hardware designs have been implemented, for several images resolutions, within an Avnet ZedBoard containing an xc7z020 Zynq FPGA device. Post-place and route characterization results demonstrate that the proposed approach is suitable for the integration in low-cost high-definition embedded video systems and smart cameras. In fact, the presented system uses 32 MB of external memory, 6 internal Block RAM, less than 16,000 Slices FFs, a little more than 20,000 Slices LUTs and it processes Full HD RGB video sequences with a frame rate of about 74 fps.
引用
收藏
页码:1407 / 1423
页数:17
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