Low-Cost Non-TSV based 3D Packaging using Glass Panel Embedding (GPE) for Power-efficient, High-Bandwidth Heterogeneous Integration

High density Logic-HBM integration, today, is built predominantly using 2.5D interposers which are fundamentally limited by long interconnect lengths, and they also are expensive as the package sizes increase. Although 3D ICs enable lowest possible latencies and power-efficiencies, they are challenged by power-delivery and thermal management issues. This paper presents, for the first time, a non-TSV based 3D face-to-face Logic-memory integration using Glass Panel Embedding (GPE) technology for high-density large package applications achieving excellent bandwidth and power-efficiency that are not possible in current approaches. The proposed architecture also achieves small form-factors, and reliability at low cost for high-bandwidth applications. Direct-board attach of such packages enabled by tailorable CTE of glass also provides radical benefits to power delivery from reduced loop-inductances. By studying the fundamental issues of panel-warpage in fan-out packages, and through process improvements achieve <80 mu m across 100x100 mm panel enabling HBM assembly at 40 mu m pitch.