An integrated patch-clamp amplifier in silicon-on-sapphire CMOS

被引：0
|
作者：
Laiwalla, Farah [1 ]
Klemic, Kathryn G. [1 ]
Sigworth, Fred J. [1 ]
Culurciello, Eugenio [1 ]
机构：
[1] Yale Univ, Dept Elect Engn, New Haven, CT 06520 USA
来源：
2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We fabricated an integrated patch-clamp amplifier capable of recording from pico- to tens of micro-amperes of current. The high-dynamic range of seven decades and the pico-ampere sensitivity of the instrument was designed for whole-cell patch-clamp recordings. The prototype was fabricated on a 0.5/mu m silicon-on-sapphire process. The device employs an integrating headstage with a frequency-modulated output pulse ranging from 3Hz to 10MHz. A digital interface produces a 16bit output conversion of the input currents. We report on electrical measurements from the fabricated device, and measurements conducted on cells in a typical patch-clamp experiment.
引用
收藏
页码：4054 / +
页数：2
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