High-Efficiency Low-EMI Buck Converter Using Multistep PWL and PVT Insensitive Oscillator

被引:4
作者
Huang, Hong-Yi [1 ]
Villaruz, Harreez M. [2 ,3 ]
Mapula, Nieva M. [2 ,3 ]
机构
[1] Natl Taipei Univ, Elect Engn Dept, Taipei 23741, Taiwan
[2] DOST ERDT, Dept Sci & Technol Engn Res & Dev Technol, Los Banos, Philippines
[3] Elite Study, Taipei, Taiwan
关键词
Frequency modulation; Electromagnetic interference; Clocks; Oscillators; Switches; Pulse width modulation; Frequency conversion; Buck converter; electromagnetic interference (EMI); EMI mitigation; EMI reduction; modulation profile; oscillator; piecewise linear (PWL); process; voltage; and temperature (PVT) insensitive oscillator; pulsewidth modulation (PWM);
D O I
10.1109/TPEL.2022.3149414
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents a high-efficiency buck converter with electromagnetic interference (EMI) reduction. The proposed buck converter employs a simple method of piecewise linear (PWL) modulation to mitigate EMI significantly. Since EMI reduction tradesoff with efficiency and ripple content, this work also integrates the design of process, voltage, and temperature (PVT) insensitive crystal-less oscillator. This technique limits the modulated switching frequency to remain within range across all process corners, supply voltage. and operating temperatures, thereby limiting the range of efficiencies and ripple content that the buck converter will incur throughout its operation. As a result, the tradeoff between efficiency and ripple content is optimized while maintaining lower output voltage spurious noise tone. The chip was implemented using the 0.18 mu m 1p6m CMOS process. The measured results show that the power spectrum's peak noise is at -60.37 dBm, and the minimum efficiency is 93% with a ripple content of less than 43.7 mV for worst-case considering PVT variations at 2.2 V input, 1.7 V output with 100 mA load current.
引用
收藏
页码:9325 / 9332
页数:8
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