A Cascaded Mode-Switching Sub-Sampling PLL With Quadrature Dual-Mode Voltage Waveform-Shaping Oscillator

被引:6
作者
Shu, Yiyang [1 ]
Qian, Huizhen Jenny [1 ]
Luo, Xun [1 ]
机构
[1] Univ Elect Sci & Technol China, Ctr Adv Semicond & Integrated Microsyst, Chengdu 611731, Peoples R China
基金
中国国家自然科学基金;
关键词
Cascaded PLL; frequency synthesizer; millimeter-wave; mode-switching; oscillator; quadrature; sub-sampling; voltage waveform-shaping; wideband; LOW PHASE-NOISE; INJECTION-COUPLED QVCO; WIDE TUNING-RANGE; FREQUENCY-SYNTHESIZER; RESONANCE; DESIGN;
D O I
10.1109/TCSI.2021.3063409
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A cascaded mode-switching sub-sampling PLL with quadrature dual-mode voltage waveform-shaping oscillator is proposed in this paper. The dual-mode voltage waveform-shaping oscillator is introduced to extend the tuning range and improve phase noise performance at mm-wave frequency, simultaneously. Meanwhile, the dual-mode quadrature topology is investigated to reduce the phase noise and quadrature phase error, compared to conventional quadrature oscillator. Then, the proposed oscillator is applied in a cascaded PLL with divider-less mode-switching sub-sampling loop, which can obtain the merits of high frequency-resolution, low loop noise, and wide frequency locking range. Both the dual-mode voltage waveform-shaping oscillator and the cascaded PLL are verified and fabricated in a 28-nm CMOS process. The FoM and FoMT of the oscillator at 10 MHz offset are -188.2 dBc/Hz and -200.7 dBc/Hz respectively. The proposed PLL prototype exhibits a frequency range from 22.8 to 33.9 GHz with a typical power consumption of 41.7 mW. The phase noise across the frequency band is from -104.1 to -108.2 dBc/Hz at 1 MHz offset. The jitter FoMj is -236.2 dB.
引用
收藏
页码:2341 / 2353
页数:13
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