Integration process of impact-ionization metal-oxide-semiconductor devices with tunneling field-effect-transistors and metal-oxide-semiconductor field-effect transistors

This paper presents the integration process of impact-ionization metal-oxide-semiconductor (I-MOS) devices, tunneling field-effect transistors (TFETs), and metal-oxide-semiconductor field-effect transistors (MOSFETs). Based on it, 70-nm I-MOS devices, TFETs, and fully depleted silicon-on-insulator (FD-SOI) MOSFETs were successfully fabricated. However, due to lack of photomasks, MOSFETs were made on separate wafers in this work. I-MOS devices have a small subthreshold swing value of 7.3 mV/dec. Although TFETs also show a normal transistor operation, there is still much room for improvement in current drivability and subthreshold swing value. The transfer characteristics of MOSFETs are similar to those of SOI MOSFETs in literatures. The integration process shows a feasibility to implement various functionalities on one chip.