Design and implementation of FIR filter by reconfigurable FPGAs for the multi-wavelength optical storage system

被引:0
作者
He, N [1 ]
Xiong, JP [1 ]
Jiang, CL [1 ]
Jia, HB [1 ]
Dong, YG [1 ]
机构
[1] Tsinghua Univ, Opt Memory Natl Engn Res Ctr, Beijing 100084, Peoples R China
来源
SIXTH INTERNATIONAL SYMPOSIUM ON OPTICAL STORAGE (ISOS 2002) | 2003年 / 5060卷
关键词
optical storage; signal processing; finite impulse response (FIR) filters;
D O I
10.1117/12.510571
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In the multi-wavelength optical storage system, multiple data streams should be processed simultaneously. Thus a group of symmetric finite impulse response (FIR) filters are designed to meet this requirement. Unlike those conventional ways that FIR filters are implemented by digital signal processing (DSP) microprocessors or application-specific integrated circuits (ASIC), those filters are implemented on a single field programmable gate array (FPGA) integrated chip to obtain an efficient and compact solution. Since FPGAs are reconfigurable, a flexible and cost efficient platform is provided for developing the multi-signal processing subsystem. The paper presents the design and implementation of an FIR filter for the signal-processing platform using the Xilinx's SRAM-based FPGA technology. The structure and the bit serial approach of the FIR filter on an FPGA chip are also presented.
引用
收藏
页码:291 / 295
页数:5
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