A Boolean approach to performance-directed technology mapping for LUT-based FPGA designs

被引：8
|
作者：
Legl, C [1 ]
Wurth, B [1 ]
Eckl, K [1 ]
机构：
[1] TECH UNIV MUNICH,INST ELECT DESIGN AUTOMAT,D-80290 MUNICH,GERMANY
来源：
33RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 1996 | 1996年
关键词：
D O I：
10.1109/DAC.1996.545669
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：730 / 733
页数：4
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