di/dt noise in CMOS integrated circuits

被引：51
作者：
Larsson, P
机构：
[1] Bell Laboratories,
来源：
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 1997年 / 14卷 / 1-2期
关键词：
ground bounce; di/dt noise; simultaneous switching noise; low-noise design;
D O I：
10.1023/A:1008255029409
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This is an overview paper presenting di/dt noise from a designer's perspective. Analysis and circuit design techniques are presented taking package parasitics into account. The main focus is on digital CMOS design, but analysis and design suggestions can easily be extended to mixed-mode design.
引用
收藏
页码：113 / 129
页数：17
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